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    IEEE Conference on Computer Communications

    IEEE Conference on Computer Communications

    ConferenceCCF 计算机网络 A

    年发文量

    研究主题

    论文(13149)

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    1P 2 C-MUX: Multiplexing with Power and Polarity Coding for Communication Efficiency.
    Zhao Li, Lijuan Zhang, Zhangbo Gao,Kang G. Shin,Hanqing Ding, Jia Liu, Shen Qian, Yicheng Liu,Zheng Yan
    2026
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    2Explainable Efficiency: Grad-CAM Analysis of Image-Based Radio Frequency Fingerprinting.
    Ingrid Huso,Savio Sciancalepore,Gabriele Oligeri,Giuseppe Piro,Gennaro Boggia
    2026
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    3MPulse: A Programmable and Autonomic Fault Detection System Via Hierarchical Liveness Exchange
    Di Wang, Haifeng Zhou, Zhengyan Zhou, Jiayu Luo,Xinyue Jiang, Xun Zhou, Yufei Ye

    Modern data center networks underpin latency-critical services such as cloud computing, AI workloads and emerging 6G applications, yet even brief switch or link failures can cascade into severe service disruptions. Existing fault detection systems face limitations: control plane centric methods incur high latency (seconds to minutes) and suffer control channel overload, while data-plane-centric approaches often rely on intrusive probing, limiting scalability. We present MPulse, a multi-dimensional fault detection and recovery framework. Our primary idea is to differentiate the roles of monitoring switches and transmission switches, shifting fault management to the data plane through two key innovations: collaborative multidimensional monitoring and a decentralized voting mechanism. Following this, we enable switches to collaboratively collect real-time status, historical data, and topological state through periodic information exchange, allowing each node to aggregate global multi-dimensional insights. Then, a distributed voting process is designed to allow switches to independently determine fault types (link/switch failure) and locations based on integrated data dimensions, eliminating dependencies on centralized control. Implemented on Intel Tofino switches with minimal overhead, MPulse achieves sub-millisecond fault localization (<1 ms), 324.8× faster detection than existing solutions, and near-100% accuracy under congestion. Experimental results validate its effectiveness and low operational costs.

    2026
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    4Cadence: Scalable RDMA Queue Pair Multiplexing Through Fine-grained WQE Scheduling
    Dexuan Liao,Jiao Zhang, Yuxuan Hu, Kaitai Zhang, Xudong Li, Jiaxin Li

    Remote Direct Memory Access (RDMA) enables high-performance communication through kernel bypass and zero-copy transfers. However, as data center clusters scale up, the number of connection grows explosively, quickly exhausting the limited on-chip memory of RNICs and triggering frequent cache misses and off-chip memory accesses, which severely constrains connection scalability and becomes a major deployment bottleneck. Existing connection-sharing schemes reduce connections counts but largely ignore head-of-line (HOL) blocking and performance interference caused by multi-flow contention on shared connections. In this paper, we present Cadence, a lightweight, fine-grained scheduling–driven RC QP sharing mechanism implemented as a user-space middleware. Cadence integrates three key components: (1) a WQE splitter that segments large messages to mitigate HOL blocking; (2) a WQE scheduler that identifies and differentially schedules heterogeneous traffic; and (3) a WQE monitor that infers RNIC cache pressure and adaptively tunes the scheduling window via closed-loop feedback. NS-3 evaluation results show that Cadence significantly reduces flow completion time (FCT) while sustaining high peak throughput. Compared to RC, Cadence reduces average FCT, P99 FCT, and average short-flow FCT by approximately 34%, 21%, and 56%, respectively, while improving throughput by 7.8%.

    2026
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    5AGILE: Achieving Max-Min Fairness and High Utilization for In-Network Bandwidth Allocation
    Yani Gong,Cunlu Li,Dezun Dong

    Network operators utilize in-network bandwidth allocation strategies to ensure fairness among competing flows. Existing approaches mainly rely on two mechanisms deployed in switches: packet scheduling algorithms and probabilistic packet dropping. However, their effectiveness is constrained by the limited number of physical priority queues and the hardware overhead of arithmetic operations. The former leads to high packet loss, resulting in low link utilization, while the latter impairs bandwidth allocation accuracy.In this paper, we propose AGILE, a novel bandwidth allocation strategy that enhances network fairness while maintaining high link utilization. Despite the limited flow visibility in switches, AGILE performs real-time global flow state tracking and optimal per-flow fair share computation to achieve max-min fairness, dynamically allocating residual bandwidth to maximize link utilization. We implement a prototype of AGILE on Intel Tofino switches. Our experimental results show that AGILE attains an average Jain’s Fairness Index (JFI) of 0.996. Compared to state-of-the-art approaches, including Cebinae and AHAB, AGILE reduces relative bandwidth allocation errors by 45.7%–86.3%, improves link utilization by 5%, and decreases link utilization fluctuations by 37%–75%.

    2026
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    高被引作者

    作者引用发文
    Wenjing Lou1369053
    Don Towsley1321279
    Kui Ren1289641
    Cong Wang1093428
    Guohong Cao1018746
    Ness B. Shroff872885
    Leandros Tassiulas816657
    Baochun Li749079
    T. V. Lakshman726353
    Yunhao Liu699488

    高产作者

    作者引用发文
    Yunhao Liu699488
    Ness B. Shroff872885
    Don Towsley1321279
    Baochun Li749079
    Eytan Modiano571769
    Eitan Altman368560
    Qian Zhang437057
    Leandros Tassiulas816657
    Tom Hou504756
    Jie Wu436354

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