Maximizing Resource Utilization for Stencil Computing

Developing FPGA applications, either using RTL or HLS, requires knowledge about the platform on which the application will be deployed. The availability of resources changes according to each FPGA model. To deal with this, the components of applications may be implemented using different primitives. For example, Floating-Point operations can be implemented using Flip-Flops and Look-up Tables, or with the addition of DSP units, the same happens for other components, such as FIFOs. During development, the implementation of the components is often chosen and used for the rest of the design. Using Integer Programming, this work explores how different floating-point implementations can be mixed to achieve performance optimization in a stencil application. Furthermore, it discusses how the same idea can be used for other components and applications.