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    专

    Treatment of nonferrous metal oxide ores - comprising heating with halides and metallic iron as reducing agent.

    1262023213650B
    发明人
    DOR A A
    受让人
    HANNA MINING CO (HANN-Non-standard)
    申请人
    Shunichi Sukegawa, Kenichi Shigenami, Mamoru Kudo
    申请号
    13122028
    申请日
    1981-11-13
    公开(公告)号
    1262023213650B
    公开(公告)日
    1991-07-10
    IPC分类号
    H03M005/12
    CPC分类号
    -
    优先权号
    342650
    优先权日
    2012-01-02
    摘要

    NOVELTY - The compressor has a rotating shaft (3) that is rotatably supported on cylinder block (2) having bore (22) forming a compression space with piston (1). A swash plate (4) is rotated together with rotating shaft for reciprocating the piston. A shoe (5) is located between swash plate and piston. The inclination angle adjusting mechanism (6) is set with a rotor (62) coupled to and rotated together with rotating shaft. A connecting element (68) is set for connecting first arm portion of swash plate and second arm portion of rotor and formed into shoe.

    USE - Variable capacity type swash plate type compressor for vehicle cooling system.

    ADVANTAGE - Since the number of shoes used in the swash plate type compressor is increased, the cost of shoe is lowered due to economies of scale and volume effect, and the manufacturing cost of the swash plate type compressor can be reduced. Since the contact area of the connecting element is increased, the abrasion of the tilt adjusting mechanism is suppressed and unstable behavior can be prevented from occurring.

    DESCRIPTION OF DRAWING(S) - The drawing shows a cross-sectional view of the swash plate type compressor.

    Piston (1)

    Cylinder block (2)

    Rotary shaft (3)

    Swash plate (4)

    Shoe (5)

    Inclination angle adjusting mechanism (6)

    Bore (22)

    Rotor (62)

    Connecting element (68)

    权利要求
    1 . A nonvolatile memory device, comprising: substrate; a plurality of memory cell groups arranged in rows and columns on the substrate, each memory cell group including a plurality of memory cells stacked along a vertical direction to the substate; a plurality of bit lines; a read and write circuit connected to the columns of the plurality of memory cell groups through the plurality of bit lines respectively; and a plurality of word lines connected to the plurality of memory cells of each memory cell group, respectively; a wordline driver connected to the rows of the plurality of memory cell groups through the plurality of word lines, the word line driver being configured, during a read operation, to apply a select read voltage to a selected word line among the plurality of word lines and to apply unselected read voltages to unselected word lines among the plurality of word lines, the wordline driver being configured, during the read operation, to apply a first unselect read voltage to a first unselected word line among the plurality of word lines and to apply a second unselect read voltage a second unselected word line among the plurality of word lines, the second unselect read voltage being lower than the first unselect read voltage, and the second unselected word line being closer to the substrate than the first unselected word line.
    2 . The nonvolatile memory device of claim 1 , wherein the plurality of word lines are divided into wordline groups, each wordline group includes at least two of the plurality of word lines, the wordline driver is configured to apply different unselect read voltages to the plurality of word lines in different wordline groups, and the wordline driver to configured to apply a same unselect read voltage to the plurality of wordlines in a same wordline group.
    3 . The nonvolatile memory device of claim 1 , wherein each of the plurality of memory cell groups further includes a plurality of second memory cells stacked along the vertical direction to the substrate on the plurality of memory cells, the wordline driver is connected to the plurality of second memory cells through a plurality of second word lines, the wordline driver is configured to, during the read operation, apply a third unselect read voltage to a third unselected word line, the third unselected word line is farthest from the substrate among the plurality of word lines, the wordline driver is configured to, during the read operation, apply a fourth unselect read voltage to a fourth unselected word line, the fourth unselected word line is closest to the substrate among the plurality of second word lines, and the fourth unselect read voltage is lower than the third unselect read voltage.
    4 . The nonvolatile memory device of claim 1 , wherein each of the plurality of memory cell groups further includes a plurality of second memory cells stacked along the vertical direction to the substrate on the plurality of memory cells, the wordline driver is connected to the plurality of second memory cells through a plurality of second word lines, the wordline driver is configured to, during the read operation, apply a third unselect read voltage to a third unselected word line among the plurality of second word lines, the wordline driver is configured to, during the read operation, apply a fourth unselect read voltage to a fourth unselected word line among the plurality of second word lines, the fourth unselect read voltage is lower than the third unselect read voltage, and the fourth unselected word line is closer to the substrate than the third unselected word line.
    5 . A nonvolatile memory device comprising: a substrate; a plurality of memory cell groups arranged in rows and columns on a substrate, each memory cell group including a plurality of memory cells stacked along a vertical direction to the substrate; a plurality of bit lines; a read and write circuit connected to columns of the plurality of memory cell groups through the plurality of bit lines respectively; a plurality of wordlines connected to the plurality of memory cells of each memory cell group, respectively; a wordline driver connected to the rows of the plurality of memory cell groups through the plurality of word lines, the wordline driver being configured, during an erase operation, to apply wordline erase voltages to the plurality of word lines, the word line driver being configured, during the erase operation, to apply a first wordline erase voltage to a first word line among the plurality of word lines and to apply a second wordline erase voltage to a second word line among the plurality of wordlines, the second wordline erase voltage being higher than the first word line erase voltage, the second wordline being closer to the substrate than the first word line.
    6 . The nonvolatile memory device of claim 5 , wherein the plurality of word lines are divided into wordline groups, each wordline group includes at least two of the plurality of word lines, the wordline driver is configured to apply different wordline erase voltages to the plurality of wordlines in different wordline groups, and the word line driver is configured to apply a same wordline erase voltage to the plurality of wordlines in a same wordline group.
    7 . The nonvolatile memory device of claim 5 , wherein each of the plurality of memory cell groups further includes a plurality of second memory cells stacked along the vertical direction to the substrate on the plurality of memory cells, the wordline driver is connected to the plurality of second memory cells through a plurality of second word lines, the wordline driver is configured to, during the erase operation, apply a third wordline erase voltage to a third word line, the third unselected word line is farthest from the substrate among the plurality of word lines, the wordline driver is configured to, during the erase operation, apply a fourth wordline erase voltage to a fourth word line, the fourth word line is closest to the substrate among the plurality of second word lines, and the fourth wordline erase voltage is higher than the third wordline erase voltage.
    8 . The nonvolatile memory device of claim 5 , wherein each of the plurality of memory cell groups further includes a plurality of second memory cells stacked along the vertical direction to the substrate on the plurality of memory cells, the wordline driver is connected to the plurality of second memory cells through a plurality of second word lines, the wordline driver is configured to, during the erase operation, apply a third wordline erase voltage to a third word line among the plurality of second word lines, the wordline driver is configured to, during the erase operation, apply a fourth wordline erase voltage to a fourth word line among the plurality of second word lines, the fourth wordline erase voltage is higher than the third wordline erase voltage, and the fourth wordline is closer to the substrate than the third word line.
    9 . A nonvolatile memory device comprising: a substrate; a plurality of memory cell groups arranged in rows and columns on the substrate, each memory cell group including a plurality of memory cells stacked along a vertical direction to the substrate; a plurality of bit lines; a read and write circuit connected to the columns of the plurality of memory cell groups through the plurality of bit lines respectively; a plurality of word lines connected to the plurality of memory cells of each memory cell group, respectively; a wordline driver connected to the rows of the plurality of memory cell groups through the plurality of word lines, the wordline driver being configured, during a verify operation, to apply a select voltage to a selected word line among the plurality of word lines and to apply unselect voltages to unselected word lines among the plurality of word lines, depending on a location of a word line among the plurality of word lines, the select voltage applied to the word line being different, and depending on the location of the word line among the plurality of word lines, one of the unselect voltages applied to the word line being different.
    10 . The nonvolatile memory device of claim 9 , wherein the select voltage being lower than the unselect voltages.
    11 . The nonvolatile memory device of claim 9 , wherein the unselect voltages being different each other depending on locations of the unselected word lines.
    12 . The nonvolatile memory device of claim 9 , wherein the plurality of word lines are divided into wordline groups, each wordline group includes at least two of the plurality of word lines, the wordline driver is configured to apply different unselect voltages among the unselect voltages to the plurality of wordlines in different wordline groups, and the wordline driver to configured to apply a same unselect voltage among the unselect voltages to the plurality of word lines in a same wordline group.
    13 . The nonvolatile memory device of claim 9 , wherein the word line driver is configured, during verify operations, to apply, a first select voltage to a first word line among the plurality of word lines, and the word line driver is configured, during the verify operations, to apply, a second select voltage to a second word line among the plurality of word lines.
    14 . The nonvolatile memory device of claim 13 , wherein the first word line is closer to the substrate than the second word line, and the first select voltage is lower than the second select voltage.
    15 . The nonvolatile memory device of claim 13 , the first select voltage and the second select voltage is applied during different first and second verify operations respectively.
    16 . The nonvolatile memory device of claim 9 , wherein each of the plurality of memory cell groups further includes a plurality of second memory cells stacked along the vertical direction to the substrate on the plurality of memory cells, the wordline driver is connected to the plurality of second memory cells through a plurality of second word lines, the wordline driver is configured to, during the verify operation, apply a first unselect voltage to a first unselected word line, the first unselected word line is farthest from the substrate among the plurality of word lines, the wordline driver is configured to, during the verify operation, apply a second unselect voltage to a second unselected word line, the second unselected word line is closest to the substrate among the plurality of second word lines, and the second voltage is lower than the first voltage.
    17 . The nonvolatile memory device of claim 9 , wherein each of the plurality of memory cell groups further includes a plurality of second memory cells stacked along the vertical direction to the substrate on the plurality of memory cells, the wordline driver is connected to the plurality of second memory cells through a plurality of second word lines, the wordline driver is configured to, during a first verify operation, apply a first select voltage to a first word line among the plurality of second word lines, the wordline driver is configured to, during a second verify operation, apply a second select voltage to a second word line among the plurality of second word lines, the second select voltage is lower than the first select voltage, and the second word line is closer to the substrate than the first word line.
    18 . The nonvolatile memory device of claim 9 , wherein the wordline driver is configured to, during a first verify operation, apply a first select voltage to a first word line among the plurality of word lines, the wordline driver is configured to, during a second verify operation, apply a second select voltage to a second word line among the plurality of word lines, the second select voltage is lower than the first select voltage, and the second word line is closer to the substrate than the first word line.
    19 . The nonvolatile memory device of claim 9 , wherein the plurality of word lines are divided into wordline groups, each wordline group includes at least two of the plurality of word lines, the wordline driver is configured to apply different select voltages to each of the plurality of word lines in different wordline groups, and the wordline driver to configured to apply a same select voltage to each of the plurality of wordlines in a same wordline group.
    20 . The nonvolatile memory device of claim 19 , wherein the different select voltages or the same select voltage is applied during different first and second verify operations respectively.
    说明书
    [0001]FIG. 1 is a perspective front, right side and bottom view of the trailer hitch attachment. FIG. 2 is a bottom plan view thereof. FIG. 3 is a top plan view thereof. FIG. 4 is a left side elevational view thereof. FIG. 5 is a right side elevational view thereof. FIG. 6 is a rear elevational view thereof; and, FIG. 7 is a rear elevational view thereof.
    同族专利
    暂无同族专利