Intelligent Reality (IR) systems deployed on resource-constrained edge devices demand efficient and reliable visual perception for real-time applications. This paper benchmarks five compact deep learning architectures —MobileNetV2, EfficientNetB0, MobileNetV3Small, NASNetMobile, and DenseNet121 — on the CIFAR-10 dataset using a unified transfer learning pipeline with frozen ImageNet-pretrained weights and a custom classification head over 50 training epochs. DenseNet121 achieved the highest training accuracy (96.18%), reflecting strong feature representation, while NASNetMobile demonstrated the most stable generalization with a validation accuracy of approximately 77%. MobileNetV3Small offered the lowest computational footprint (~1.01M parameters, 66M FLOPs), making it the most suitable candidate for extreme edge deployments. EfficientNetB0 failed to converge under the frozen-backbone configuration, attributed to a resolution mismatch at 32×32 input rather than an intrinsic architectural deficiency. Evaluation encompassed parameter efficiency, convergence behavior, validation stability, macro-average ROC curves, and per-class confusion matrix diagnostics. To the authors' knowledge, this is the first study comparing these five architectures within a single frozen-backbone pipeline explicitly targeting IR edge deployment, providing an empirical framework to guide architectural decisions for real-time visual perception systems.

The TEXTAROSSA project aims to bridge the technology gaps that exascale computing systems are currently facing and will be key in the near future to overcome performance and energy efficiency challenges. This project provides solutions for improved energy efficiency by using state-of-the-art cooling and thermal control, seamless integration of heterogeneous accelerators in HPC multi-node platforms, and new arithmetic methods tailored to heterogeneous hardware platforms. Challenges are tackled through a co-design approach to heterogeneous HPC solutions, supported by the integration and extension of HW and SW IPs, programming models, and tools derived from European research.

This paper presents the design, simulation, and analysis of a compact rectenna system including antenna, matching network, and rectifier, for powering ultra-low-power IoT devices via ambient RF energy harvesting. The proposed solution targets operation in the 2.45 GHz ISM band and is implemented using PCB-compatible technologies. A planar inverted-F antenna (PIFA) with a coplanar stub achieves a compact footprint of 32.6 mm × 16.87 mm while featuring a bandwidth of 110 MHz and a gain of 1.49 dBi. The rectifier employs a double-voltage Dickson topology optimized for a 5 k Ω load and -15 dBm input, showing a peak efficiency of 47.28 × 10 mm. The complete rectenna system, including a distributed matching network, demonstrates reliable performance with a footprint of 67.4 mm × 16.87 mm. These results validate its suitability for battery-less or battery-assisted IoT applications.

High-performance computing (HPC) systems increasingly rely on vector architectures to provide the scalability and parallelism required for large-scale data processing. The RISC-V Vector Extension (RVV), defined within the open and modular RISC-V architecture, has emerged as a prominent standard in this domain. A central component of RVV-enabled processors is the vector register file (VRF), whose capacity scales with vector length and implementation parameters, thereby increasing its susceptibility to hardware faults, including transient soft errors and permanent aging-related failures. Because the VRF stores critical architectural state, inadequate protection may lead to silent data corruption, which is particularly detrimental in large HPC deployments. This work enhances system reliability, availability, and serviceability (RAS) by integrating Single-Error Correction and Double-Error Detection (SECDED) error-correcting codes within the VRF. In addition, we implement the RISC-V RAS Error Logging and Reporting Interface (RERI), which defines a unified error taxonomy and memory-mapped error records to report hardware events to the system software. Experimental results show that the combination of SECDED protection and a RERI-compliant hardware–software interface significantly improves the resilience (i.e. RAS) of RVV-based processors while incurring modest and implementation-tunable area overhead.

Reliable battery management in automotive applications requires accurate electro-thermal models and robust state-estimation algorithms. However, experimental datasets capturing the combined effects of temperature, current, and aging are often limited due to cost, duration, and safety constraints. This work proposes a unified physics-informed generative framework for large-format LFP cells, embedding electro-thermal and aging dynamics within a variational autoencoder to generate dynamically consistent synthetic data. The framework reproduces electrical transients, relaxation effects, thermal behavior, and long-term degradation, enabling the identification of temperature-dependent open-circuit voltage characteristics, Thevenin parameters, and compact thermal models. Based on the identified model, a dual monitoring architecture is developed, combining a PI-corrected SOC observer with an adaptive SOH estimator for capacity fade tracking. Numerical results show that the SOC estimation error remains within about 2% over a wide temperature range, with convergence typically achieved within 200 s under dynamic conditions. The SOH estimator accurately tracks both gradual and abrupt degradation over accelerated aging scenarios. The achieved performance is consistent with established extended Kalman filter-based approaches reported in the literature. Overall, the proposed framework enables data augmentation, accurate parameter identification, and reliable SOC-SOH estimation under varying temperature, load, and aging conditions, supporting real-time battery management applications.

Task offloading is a key enabler for delay-sensitive Internet of Vehicles (IoV) services, where vehicular applications must be executed under strict latency constraints. This paper proposes a Proximal Policy Optimization (PPO)-based binary offloading framework that selects between Multi-access Edge Computing (MEC) and Cloud execution. Unlike purely simulation-based approaches, the proposed framework is built on a real-data-driven environment derived from vehicular mobility traces and measured service-delay observations collected from the Modena Automotive Smart Area (MASA) testbed. The RL agent observes mobility and delay-related features and learns a deadline-aware offloading policy through reward-driven interaction with the environment. Experimental results under a 50 ms deadline show that PPO achieves the best overall trade-off between task acceptance and delay control, while providing a more stable service behavior than fixed baselines.

This article presents a performant and compact hardware accelerator for the module-lattice key encapsulation mechanism (ML-KEM) algorithm, compliant with the NIST FIPS 203 specification and implemented in a 22-nm ASIC technology. The proposed design supports all three standardized security levels (ML-KEM-512, -768, and -1024) using a unified, parameter-agnostic architecture that avoids logic duplication. The design relies exclusively on SRAM blocks for storage, completely eliminating FIFOs and intermediate buffers, while flip-flops are used only in timing-critical paths to achieve high-frequency operation with minimal area overhead. Among all known ASIC implementations, our architecture achieves the best normalized area-time product (ATP) across all ML-KEM parameter sets, demonstrating efficiency and scalability while also delivering the lowest power and energy per operation among state-of-the-art solutions. These results make the proposed design a strong candidate for real-world post-quantum cryptographic deployments on constrained hardware and IoT platforms.

This work aims to implement a multi-feature intrusion detection system for the CAN bus. As vehicle technologies become more advanced, automated, and connected, their electronic systems become increasingly vulnerable to cyberattacks. To address these risks, an effective intrusion detection system is crucial. We propose combining two detection methods: Rule-based Intrusion Detection and Timing ECU Fingerprinting. This integration enhances detection capabilities by compensating for the limitations of each approach individually. Testing was conducted on an embedded board with typical automotive computational power (AURIX TC375Lite) using an experimental prototype to simulate realistic data traffic.

The article proposes an algorithm for monitoring data traffic in CAN networks on board vehicles. This algorithm detects cyber-attacks through statistical analysis of voltage samples from the protocol’s physical layer. The method aims to be compact and achieve real-time throughput for implementation on an embedded platform. In the article are shown tests of the proposed method on the Automotive MCU AURIX TC375. The Electronic Control Unit (ECU) classification algorithm results from the re-elaboration of the K-Nearest Neighbor (KNN) method. Using .dbc and recorded .asc traces acquired from a real vehicle (Giulietta Alfa Romeo model), the message traffic is reconstructed and replicated via experimental prototype, providing different voltage levels for each device used to emulate the ECU. The article evaluates the algorithm performance through extensive experiments, assessing its ability to detect traffic anomalies in various attack scenarios.

ABSTRACT This article presents an adaptive model predictive control (AMPC) algorithm for real‐time management of a six‐phase permanent magnet synchronous motor. The system optimizes both speed control and power dissipation, featuring an automated power derating mechanism for overload conditions. AMPC demonstrated advantages over traditional field‐oriented control, including reduced losses and lower energy consumption, while maintaining robust performance and high speed control precision. Validation through hardware‐in‐the‐loop testing on the dSPACE platform confirmed its effectiveness. The contribution focuses on enhanced stability, robustness, and integrating predictive features to further improve efficiency and adaptability in electric drive systems.

The electrification of automotive powertrains has accelerated research efforts in the modeling, control, and monitoring of electric drive systems, where reliability, safety, and efficiency are key enablers for mass adoption. Despite a large corpus of literature addressing individual aspects of electric drives, current surveys remain fragmented, typically focusing on either multiphysics modeling of machines and converters, or advanced control algorithms, or diagnostic and prognostic frameworks. This review provides a comprehensive perspective that systematically integrates these domains, establishing direct connections between high-fidelity models, control design, and monitoring architectures. Starting from the fundamental components of the automotive power drive system, the paper reviews state-of-the-art strategies for synchronous motor modeling, inverter and DC/DC converter design, and advanced control schemes, before presenting monitoring techniques that span model-based residual generation, AI-driven fault classification, and hybrid approaches. Particular emphasis is given to the interplay between functional safety (ISO 26262), computational feasibility on embedded platforms, and the need for explainable and certifiable monitoring frameworks. By aligning modeling, control, and monitoring perspectives within a unified narrative, this review identifies the methodological gaps that hinder cross-domain integration and outlines pathways toward digital-twin-enabled prognostics and health management of automotive electric drives.

This work describes the hardware implementation of a cryptographic accelerators suite, named Crypto-Tile, in the framework of the European Processor Initiative (EPI) project. The EPI project traced the roadmap to develop the first family of low-power processors with the design fully made in Europe, for Big Data, supercomputers and automotive. Each of the coprocessors of Crypto-Tile is dedicated to a specific family of cryptographic algorithms, offering functions for symmetric and public-key cryptography, computation of digests, generation of random numbers, and Post-Quantum cryptography. The performances of each coprocessor outperform other available solutions, offering innovative hardware-native services, such as key management, clock randomisation and access privilege mechanisms. The system has been synthesised on a 7 nm standard-cell technology, being the first Cryptoprocessor to be characterised in such an advanced silicon technology. The post-synthesis netlist has been employed to assess the resistance of Crypto-Tile to power analysis side-channel attacks. Finally, a demoboard has been implemented, integrating a RISC-V softcore processor and the Crypto-Tile module, and drivers for hardware abstraction layer, bare-metal applications and drivers for Linux kernel in C language have been developed. Finally, we exploited them to compare in terms of execution speed the hardware-accelerated algorithms against software-only solutions.

The early detection of fire and smoke is essential for mitigating human casualties, property damage, and environmental impact. Traditional sensor-based and vision-based detection systems frequently exhibit high false alarm rates, delayed response times, and limited adaptability in complex or dynamic environments. Recent advances in deep learning and computer vision have enabled more accurate, real-time detection through the automated analysis of flame and smoke patterns. This paper presents a comprehensive review of deep learning techniques for fire and smoke detection, with a particular focus on convolutional neural networks (CNNs), object detection frameworks such as YOLO and Faster R-CNN, and spatiotemporal models for video-based analysis. We examine the benefits of these approaches in terms of improved accuracy, robustness, and deployment feasibility on resource-constrained platforms. Furthermore, we discuss current limitations, including the scarcity and diversity of annotated datasets, susceptibility to false alarms, and challenges in generalization across varying scenarios. Finally, we outline promising research directions, including multimodal sensor fusion, lightweight edge AI implementations, and the development of explainable deep learning models. By synthesizing recent advancements and identifying persistent challenges, this review provides a structured foundation for the design of next-generation intelligent fire detection systems.

The growing complexity and density of battery systems in electric vehicles and stationary storage applications have highlighted the limitations of traditional wired Battery Management Systems (BMS), particularly in terms of weight, wiring harness complexity, and mechanical reliability. While various wireless BMS (wBMS) architectures leveraging far-field communication have been explored, this work focuses on a novel approach based on near-field wireless coupling, exploiting magnetic coupling between a microstrip Transmission Line (TL) antenna and compact loop antennas suitable for Radio Frequency Identification (RFID) sensor tags directly embedded on battery cells. The proposed system is analyzed through full-wave electromagnetic simulations at 866.5 MHz and 2.4 GHz. The coupling between the TL antenna and the loop in free space is studied in detail via S21 parameter extraction. Simulation results show consistent and predictable coupling behavior, which is experimentally validated through measurements using a magnetic probe on a 20 cm microstrip prototype. The impact of realistic packaging conditions is also evaluated, including the presence of silicone-based dielectric foam layers between the TL antenna and the loop antennas, confirming the robustness of the coupling. Values of scattering parameter S21 across both frequency bands demonstrate compatibility with low-power wireless BMS and scalable Internet of Things (IoT) applications without the need for intra-pack wiring. This work provides key insights for the development of efficient and reliable near-field architectures as an alternative to far-field or wired monitoring systems.

The rise of large language models (LLMs) has spurred recent advances in artificial intelligence (AI), transforming natural language generation and processing. These models perform exceptionally well in a variety of tasks, including machine translation and sentiment analysis, thanks to their unparalleled size and complexity. However, their complexity poses computational difficulties that call for strong hardware acceleration and effective algorithms. To tackle this, we investigate how to speed up LLM processes using the ARM Scalable Vector Extension (SVE). With its ability to vectorize, SVE can potentially improve ARM-based processors’ parallel processing. We present the results of this approach, describing the features of SVE, and going over optimization strategies for LLMs on high-performance computing systems. The results of our experiments show how SVE auto-vectorization enables a speed-up by a factor of up to 4.25× in training time compared to a non-SVE optimized code.

Driver distraction and inattention are major contributors to traffic accidents, making reliable real-time driver state detection essential for intelligent transportation systems. Although deep learning (DL) has significantly improved detection accuracy, conventional models remain computationally demanding and are often unsuitable for deployment on embedded or low-power hardware. To address these limitations, this study benchmarks seven lightweight architectures—Efficient-Tiny, ESPNetv2-Small, MCUNet, Micro-MobileNet, PhiNets, ShuffleNetLite, and SqueezeNetv11—within a unified evaluation framework tailored for embedded deployment. Experimental results demonstrate that ESPNetv2-Small and SqueezeNetv11 achieved the highest accuracies of 99.50