Andrew B. Kahng
Department of Computer Science & Engineering Jacobs School of Engineering, University of California, San Diego/Department of Electrical and Computer Engineering, Jacobs School of Engineering, University of California, San Diego
Ever since the integrated circuit or IC was invented, transistor counts and clock speeds on microprocessors, memory, and other chips have doubled roughly every two years. Kahng is a leader in multiple efforts to maintain this pace, dubbed Moore's Law. One focus is helping to specify the next-generation computer-aided design (CAD) tools that take into account physical design aspects once left for the foundry. Problems with physical implementations of logic have been driving up costs as IC designs have grown more complex. Kahng can speak extensively about this topic and the state of the art in software for IC placement and routing, power leakage, interconnect analysis and optimization, and other physical phenomena. Kahng is a leader in "roadmapping" efforts that help rationalize research spending. Since 2000, Kahng has been chair of the Design technology working group for the International Technology Roadmap for Semiconductors. ITRS is sponsored by the major semiconductor consortia of North America, Europe, and the Far East, and also is backed by key manufacturers, suppliers, government organizations, and universities.