Diederik Verkest

He started working in the VLSI Design Methodology Group, imec, Leuven, on hardware/software co-design, re-configurable systems, and multi-processor system-on-chips in the domain of wireless and multimedia. From 2010 to 2020, he was responsible for the imec’s Logic Insite Research Program in which the leading design and process companies jointly work on co-optimization of CMOS design and process technology for N+2 nodes. In recent years, he focused on design and process technology optimization for ML accelerators. He has published and presented over 150 articles in international journals and at international conferences.