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个人简介
Titular Professor on Logic Design and ASIC Design at the School of Engineering (EPS), Universidad Autónoma de Madrid, Spain (UAM). Honorary professor at CAECE University, Argentine. Ph.D. in Telecom. Engineering from the Universidad Politécnica de Madrid, Spain, and Electrical Engineer degree from the Universidad Nacional de Mar del Plata, Argentine.
General Chairman of FPL 2006, SPL (2008, 2007, and 2006 editions), JCRA (2007 and 2003 editions). Director of the EUROFORM Spanish Pole, an organization to provide professional training on FPGAs. Member of Technical Committees of FPGA conferences. Associate Editor of the ACM Transactions on Reconfigurable Systems. Member of the Editorial Board of the Journal of Low-Power Electronics. Co-editor of the Special Issue on FPGAs of the IET Computer & Digital Techniques Journal (July, 2007).
Papers, Ph.D.Thesis, Seminars and Courses are focused on FPGA-based systems; in particular: Area–Time-Power Optimization, Thermal Testing, Self-Timed Synchronization, E.E. Education, Custom DSPs, and Robotics.
研究兴趣
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2020 Argentine Conference on Electronics (CAE)pp.1-7, (2020)
2018 IEEE INTERNATIONAL CONFERENCE ON AUTOMATION/XXIII CONGRESS OF THE CHILEAN ASSOCIATION OF AUTOMATIC CONTROL (ICA-ACCA)pp.1-4, (2018)
user-5dd52aee530c701191bf1b99(2016)
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