His research interests include synthesis, verification simulation, and testing of digital circuits and systems.

Awards
Best Paper Award EURO-VHDL ’96 for the paper titled “BDD-based Testability Estimation of VHDL Designs” presented at IEEE/ACM European Design Automation Conference and Euro-VHDL, Ginevra, Switzerland, September 16-20 1996.

My Ph.D. thesis was awarded the “1997 Prize for Engineering and Technology – THE DIMITRIS N.CHORAFAS FOUNDATION”, 26-08-1997.

Best Paper Award DATE ’99 for the paper titled “Symbolic functional vector generation for VHDL specifications” presented at IEEE/ACM DATE ’99 – Design, Automation and Test in Europe, Munich, Germany, March 9-12 1999.