Kyomin Sohn

Kyomin Sohn (kyomin.sohn@samsung.com) is Samsung Master (VP of technology) at Samsung Electronics in Hwaseong, Gyeonggi-do, South Korea and responsible for future architecture and circuits for DRAM. He received his B.S. and M.S. degrees in electrical engineering in 1994 and 1996, respectively, from Yonsei University, Seoul, Korea. From 1996 to 2003, he was with Samsung Electronics, Korea, involved in the SRAM Design Team. He designed various high-speed SRAMs for external cache and buffer memory. He received his Ph.D. degree in electrical engineering and computer science in 2007 from KAIST, Daejeon, Korea. He rejoined Samsung Electronics in 2007, where he has been involved in the DRAM Design Team. His research interests include next-generation 3D DRAM; reliable memory design; and memory subsystems, including processing-in-memory for artificial intelligence applications. In addition, he has served as a Technical Program Committee member for the Symposium on VLSI Circuits since 2012.