Steven Wright

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METAL WIRING STRUCTURES FOR UNIFORM CURRENT DENSITY IN C4 BALLS

Timothy H Daubenspeck, Wolfgang Sauter, Timothy D Sullivan,S L Wright,Edmund J Sprogis

(2012)

Cited by6Bibtex

Three-Dimensional Chip Stack With Integrated Decoupling Capacitors and Thru-Si Via Interconnects

Bing Dang, M A Shapiro,Paul S Andry,C Tsang,Edmund J Sprogis,S L Wright,Mario J Interrante, J E Griffith,Vovan Truong, Luc Guerin, R Liptak,Daniel J Berger

IEEE Electron Device Letters, no. 12 (2010): 1461-1463

Cited by11EIWOSBibtex

3D chip-stacking technology with through-silicon vias and low-volume lead-free interconnections

K. Sakuma,P. S. Andry,C. K. Tsang,S. L. Wright,B. Dang,C. S. Patel,B. C. Webb,J. Maria,E. J. Sprogis,S. K. Kang,R. J. Polastre,R. R. Horton

IBM Journal of Research and Development, no. 6 (2008): 611-622

Cited by107EIBibtex

Reliability testing of through-silicon vias for high-current 3D applications

S L Wright,Paul S Andry,Edmund J Sprogis,Bing Dang,R J Polastre

(2008)

Cited by11Bibtex

Characterization of stacked die using die-to-wafer integration for high yield and throughput

Katsuyuki Sakuma,Paul S Andry,Cornelia K Tsang,Kuniaki Sueoka,Yukifumi Oyama,Chirag S Patel,Bing Dang,S L Wright,Bucknell C Webb,E Sprogis,R J Polastre,Raymond R Horton

(2008)

Cited by25Bibtex

Characterization of micro-bump C4 interconnects for Si-carrier SOP applications

S L Wright,R J Polastre,Haitao Gan,L P Buchwalter,Raymond R Horton,Paul S Andry,Edmund J Sprogis,Chirag Patel, Ching Tsang,John U Knickerbocker, J R Lloyd,Ajay Kumar Sharma

(2006)

Cited by58Bibtex

A CMOS-compatible process for fabricating electrical through-vias in silicon

Paul S Andry, Ching Tsang,E Sprogis,Chirag S Patel,S L Wright,Bucknell C Webb,L P Buchwalter,Dennis G Manzer,Raymond R Horton,R J Polastre,John U Knickerbocker

(2006)

Cited by80Bibtex

Pb-free microjoints (50 /spl mu/m pitch) for the next generation microsystems: the fabrication, assembly and characterization

Haitao Gan,S L Wright,R J Polastre,L P Buchwalter,Raymond R Horton,Paul S Andry,Chirag S Patel, Ching Tsang,John U Knickerbocker,Edmund J Sprogis, A Pavlova,S K Kang

San Diego, CA, (2006)

Cited by39EIWOSBibtex

3-D silicon integration and silicon packaging technology using silicon through-vias

John U. Knickerbocker,Chirag S. Patel,Paul S. Andry,Cornelia K. Tsang,L. Paivikki Buchwalter,Edmund J. Sprogis, Hua Gan,Raymond R. Horton,Robert J. Polastre,Steven L. Wright,John M. Cotte

custom integrated circuits conference, no. 8 (2006): 1718-1725

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Steven WrightBinding

Papers9 papers

Steven Wright