Tor Lund-Larsen is the Engineering Manager for the Advanced Memory Research team within Intel Labs Germany in Braunschweig, Germany. During his time with Intel Labs, Tor has worked on projects ranging from FPGA based proto-types for multi-radio and adaptive clocking to analog clocking concepts and memory controllers. His research interests include multi-level memory, Computation-in Memory for many-core architecture, resiliency and high bandwidth memory