Yasuo Nara

Yasuo Nara (SM'07) received the B.S., M.S., and Ph.D. degrees in physical electronics from Tokyo Institute of Technology, Tokyo, Japan, in 1980, 1982, and 1985, respectively. He joined Fujitsu Laboratories Ltd., Kawasaki, Japan, in 1985 and has been engaged in the research and development of Si-based semiconductor technologies. From 2004 to 2008, he has been in charge of gate stack technology development in Semiconductor Leading Edge Technologies Inc. He is currently in charge of advanced Si large-scale integration technology development in Fujitsu Semiconductor Ltd. He is the author or coauthor of more than 270 journals and international conference papers in the field of semiconductor research. Dr. Nara is a member of the Japan Society of Applied Physics, the Institute of Electronics, Information and Communication Engineers, and the IEEE Electron Devices Society.