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Research My research focuses on modeling and design techniques for reliable, low-power, and high-performance systems, motivated by advances in nanoelectronics and information analytics. If you are interested, welcome to come by during my office hours. For more in-depth information, please visit the webpage of the NIMO Group. I am particularly interested in the following topics: Neural-inspired design for learning on-a-chip Physical-level design and tools for integrated systems Compact modeling for nanoscale CMOS and post-silicon technologies Reconfigurable design of CMOS circuits and beyond Honors IEEE Fellow, “for development of predictive technology models for reliable circuit and system integration,” 2017. Top 5% Teaching Award, Ira. A. Fulton Schools of Engineering, ASU, 2016. Top 5% Teaching Award, Ira. A. Fulton Schools of Engineering, ASU, 2015. Top 5% Teaching Award, Ira. A. Fulton Schools of Engineering, ASU, 2013. Best Paper Award: “Temporal performance degradation under RTN: evaluation and mitigation for nanoscale circuits,” ISVLSI 2012. Top 5% Teaching Award, Ira. A. Fulton Schools of Engineering, ASU, 2012. Top 5% Teaching Award, Ira. A. Fulton Schools of Engineering, ASU, 2010. ACM SIGDA Outstanding New Faculty Award, 2009. Promotion and Tenure Faculty Exemplar, Arizona State University, 2009. IEEE Distinguished Lecturer of the Circuits and Systems Society (CAS), 2009. Chunhui Award for Outstanding Oversea Chinese Scholars, Ministry of Education of China, 2008. Best Paper Award: “Compact modeling of carbon nanotube transistor for early stage process-design exploration,” ISLPED 2007. IBM Faculty Award, 2007. NSF Faculty Early Career Development (CAREER) Award, 2006. IBM Faculty Award, 2006. Best Paper Award: “SRAM leakage suppression by minimizing standby supply voltage,” ISQED 2004. Beatrice Winner Award: “Accurate in-situ measurement of peak noise and signal delay induced by interconnect coupling,” ISSCC 2000. Regents Fellowship, University of California, Santa Cruz, 1996.