Cosmic ray neutron-induced soft errors in sub-half micron CMOS circuits

IEEE Electron Device Letters(1997)

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摘要
We numerically investigated cosmic ray neutron-induced soft errors in sub-half micron CMOS SRAM and Latch circuits at sea level. For our purpose, we developed an original simulator which well reproduces the experimental charge collection data. We investigated soft error rates (SER's) and showed that the neutron-induced SER's in the SRAM are the same order as those due to alpha-particles and the SER's in the Latch are dominated by neutrons.
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CMOS logic circuits,CMOS memory circuits,SRAM chips,circuit analysis computing,errors,flip-flops,integrated circuit modelling,neutron effects,0.35 to 0.5 micron,SER,SRAM circuits,charge collection data,cosmic ray neutron-induced soft errors,latch circuits,sea level,simulator,soft error rates,sub-half micron CMOS circuits
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