Performance Analysis Framework for High-Level Language Applications in Reconfigurable Computing
TRETS, ArticleNo.5, 2010.
High-Level Languages (HLLs) for Field-Programmable Gate Arrays (FPGAs) facilitate the use of reconfigurable computing resources for application developers by using familiar, higher-level syntax, semantics, and abstractions, typically enabling faster development times than with traditional Hardware Description Languages (HDLs). However, pr...More
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