Trading off area, yield and performance via hybrid redundancy in multi-core architectures

VTS, pp. 1-6, 2013.

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EI

Abstract:

Manufacturing yield is a major concern for modern CMOS technologies. Fortunately, evolving chip architectures such as multi-cores have provided new venues for yield enhancement, and calls for a fresh perspective on the classic method of redundancy insertion. In this paper we outline a new approach towards redundancy insertion in modern mu...More

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