Comparison of 2D Memory SEU Transport Simulation with Experiments

Single event upset (SEU) simulations in SRAM cells have been carried out and the results are compared to experimental data on 16K bit memories. The simulations consisted of simultaneous calculations of charge transport and transient circuit response for four cross-coupled CMOS transistors following the introduction of a slab of excess carriers into the "off" p-channel drain. The experiments collec...