An End-to-End Tool Flow for FPGA-Accelerated Scientific Computing

IEEE Design & Test of Computers, pp. 68-77, 2011.

Cited by: 1|Bibtex|Views5|DOI:https://doi.org/10.1109/MDT.2011.46
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Abstract:

Editor's note:As part of their ongoing work with the National Science Foundation (NSF) Center for High-Performance Reconfigurable Computing (CHREC), the authors are developing a complete tool chain for FPGA-based acceleration of scientific computing, from early-stage assessment of applications down to rapid routing. This article provides ...More

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