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PRO3: A Hybrid NPU Architecture

Ioannis Papaefstathiou,Stylianos Perissakis,Theofanis G. Orphanoudakis,Nikos A. Nikolaou,George Kornaros,Nicholas A. Zervos,George Konstantoulakis,Dionisios N. Pnevmatikatos,Kyriakos Vlachos

IEEE Micro（2004）

Cited 6|Views23
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Abstract
The PRO3 reduces the overhead incurred by common "brute-force" architectures by using the least-required hardware resources for certain common well-defined tasks.
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Key words
hybrid npu architecture,least-required hardware resource,certain common well-defined task,circuit complexity,protocols,vlsi,semiconductor devices,system on chip,reduced instruction set computing,protocol data unit
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