A Novel Erase Scheme to Suppress Overerasure in a Scaled 2-Bit Nitride Storage Flash Memory Cell

The cause of over-erasure in a two-bit nitride storage flash memory cell is investigated. Extra positive charges accumulated above the n/sup +/ junction and channel-shortening enhanced drain-induced barrier lowering effect are found to be responsible for threshold voltage (V/sub t/) lowering in an over-erased cell. A modified erase scheme is proposed to resolve this issue. By applying a source vol...