A Cost-Effective Digital Front-End Realization For 20-Bit Sigma Delta Dac In 0.13 Mu M Cmos

PROCEEDINGS OF THE IEEE 2007 CUSTOM INTEGRATED CIRCUITS CONFERENCE(2007)

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摘要
A cost-effective digital front-end used in 20-bit Sigma Delta DAC for audio applications is described in this paper. The digital front-end is composed of an interpolator and a Sigma Delta modulator (DSM). Mixed-radix number representation (MRNR) algorithm combined with poly-phase filtering technique and high efficiency hardware realization method are used to achieve high data conversion precision and reduce the area of the interpolator. A single bit distributed feedback structure is adopted for DSM to shape quantization noise. The digital front-end works at a 1.2-V power supply and is implemented in 0.13 mu m CMOS process, which occupies a die area of 0.63mm(2). and achieves more than 130dB dynamic range.
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关键词
quantization noise,cost effectiveness,cmos,dynamic range,front end,data conversion
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