A fault-tolerant network-on-chip design using dynamic reconfiguration of partial-faulty routing resources.Zhiliang Qian,Ying Fei Teh,Chi-Ying TsuiVLSI-SOC(2011)引用 3|浏览10暂无评分关键词simulation,network routing,network on chip,integrated circuit design,fault tolerance,routingAI 理解论文溯源树样例生成溯源树,研究论文发展脉络