A single-phase energy metering SoC with IAS-DSP and ultra low power metering mode

SoCC(2011)

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摘要
A single-phase energy metering SoC in TSMC 0.25um mixed-mode embedded FLASH technology is designed. While integrating four channel sigma-delta ADCs, PLL, oscillation circuit, regulators, temperature sensor, 8-bit CPU core, 32K byte FLASH memory, 1K byte SRAM memory, energy metering engine, and various on-chip peripherals, a small die size is achieved due to the implement of an 32-bit fixed-point Instruction and Architecture Specific DSP (IAS-DSP) to conduct the carefully designed multi-rate energy metering algorithm. To satisfy critical power restrictive applications, several ultra low power metering modes are designed. With these modes and the IAS-DSP, there is only about 100uA current dissipation while metering accuracy still meets industrial standards. The experimental results also prove excellent EMI rejection features. The chip is currently in production and millions has been shipped.
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关键词
ias-dsp,regulators,flash memory,word length 32 bit,cpu core,low power,dsp,memory size 32 kbyte,word length 8 bit,fixed-point instruction and architecture specific dsp,analogue-digital conversion,soc,energy metering engine,tsmc mixed-mode embedded flash technology,sram chips,power meters,energy metering,pll,system-on-chip,digital signal processing chips,phase locked loops,ultra low power metering mode,multirate energy metering algorithm,emi rejection,channel sigma-delta adc,single-phase energy metering soc,on-chip peripherals,oscillation circuit,power integrated circuits,industrial standards,temperature sensor,size 0.25 mum,sram memory,flash memories,memory size 1 kbyte,system on chip
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