A low-area switched-resistor loop-filter technique for fractional-N synthesizers applied to a MEMS-based programmable oscillator

Michael H. Perrott,Sudhakar Pamarti,Eric G. Hoffman,Fred S. Lee,Shouvik Mukherjee,Cathy Lee,Vadim Tsinker,Sathi Perumal,Benjamin Soto,Niveditha Arumugam,Bruno W. Garlepp

Solid-State Circuits Conference Digest of Technical Papers（2010）

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摘要

A fractional-N synthesizer is used in a programmable 1 to 115 MHz MEMS oscillator. A high gain phase detector lowers the impact of loop filter noise, and a switched-resistor loop filter avoids a charge pump and boosts effective resistance to save area. The entire synthesizer with LC-VCO occupies 0.31 mm2 in 0.18 Â¿m CMOS. Chip consumption is 3.7 mA drawn from a 3.3 V supply for a 20 MHz output with no load.

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关键词

CMOS integrated circuits,frequency synthesizers,voltage-controlled oscillators,CMOS,MEMS-based programmable oscillator,current 3.7 mA,fractional-N synthesizers,frequency 1 MHz to 115 MHz,loop filter noise,low-area switched-resistor loop-filter technique,phase detector,size 0.18 mum,switched-resistor loop filter,voltage 3.3 V

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