New DfT architectures for 3D-SICs with a wireless test port
Proceedings of International Conference on ASIC, 2013.
This paper proposes two Design-for-Test (DfT) architectures for three-dimensional stacked ICs (3D-SICs) with a wireless test port. The two architectures use different test wrappers and TAMs, while the stack is partitioned into two subsets in both schemes. By testing the subsets simultaneously using the wired test port and the wireless tes...More
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