Processor Design with Asymmetric Reliability
ISVLSI, pp. 565-570, 2014.
Continuous shrinking of device size has introduced reliability as a new design challenge for embedded processors. Error mitigation techniques trade off reliability for other design metrics such as performance and power consumption. State-of-the-art fault-tolerant designs involve cross-layer error management, which lead to an over-protecte...更多
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