Assembly and packaging of non-bumped 3D chip stacks on bumped substrates

Bing Dang,Joana Maria,Qianwen Chen,Jaewoong Nah,Paul S Andry,C Tsang,Keita Sakuma,Christy S Tyberg,R P Robertazzi,M Scheuermann,Michael A Gaynes,John U Knickerbocker

Electronic Components and Technology Conference（2014）

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摘要

In this paper, a novel assembly and packaging approach is proposed for 3D/2.5D chip stacks based on bumped substrates. The thinned chips are stacked using thermal compression bonding with “flat” metallization to reduce assembly complexity associated with conventional controlled-collapse-chip-connection (C4) solder bumps. Meanwhile, the laminate substrates are bumped with C4s using injected molten solder (IMS) processes. The pre-stacked chips are then assembled and packaged on the bumped laminates successfully.

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关键词

integrated circuit bonding,integrated circuit metallisation,integrated circuit packaging,laminates,solders,three-dimensional integrated circuits,3d-2.5d chip stacks,c4 solder bumps,ims,assembly complexity,bumped laminates,bumped substrates,controlled-collapse-chip-connection solder bumps,flat metallization,injected molten solder,laminate substrates,nonbumped 3d chip stack assembly,nonbumped 3d chip stack packaging,thermal compression bonding,thinned chips,films,assembly,resists

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