A UHS-II SD card controller with 240MB/s write throughput and 260MB/s read throughput

Kenta Yasufuku,Naoto Oshiyama,Toshitada Saito,Yukimasa Miyamoto, Yutaka Nakamura,Ryota Terauchi, Atsushi Kondo,Takuma Aoyama,Masafumi Takahashi,Yukihito Oowaki, Ryoichi Bandai

A-SSCC（2014）

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摘要

This paper presents a UHS-II SD card controller with 240MB/s write and 260MB/s read throughput. Two opposite direction IO lanes for down- and up-streams are quickly switched as single direction for double data rate, without adding extra IO pins. The proposed clock data recovery (CDR) logic can detect symbols within 20ns and minimizes this lane switching overhead. The developed SLVS-type driver that can reduce the common to differential return loss by 15dB is also introduced to improve the noise tolerance.

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关键词

clock and data recovery circuits,semiconductor storage,cdr logic,io lanes,io pins,slvs-type driver,uhs-ii sd card controller,clock data recovery logic,double data rate,down-streams,loss 15 db,noise tolerance improvement,read throughput,up-streams,write throughput,cdr,sd cards,uhs-ii,bidirectional,return loss,serial interface,noise,switches,data transfer,throughput,impedance

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