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Verifying sequential consistency on shared-memory multiprocessors by model checking

Parallel and Distributed Systems, IEEE Transactions, no. 8 (2003): 730-741

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The memory model of a shared-memory multiprocessor is a contract between the designer and the programmer of the multiprocessor. A memory model is typically implemented by means of a cache-coherence protocol. The design of this protocol is one of the most complex aspects of multiprocessor design and is consequently quite error-prone. Howev...更多

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