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Fault diagnosis and logic debugging using Boolean satisfiability

MTV, pp.60-65, (2003)

Cited: 53|Views27
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Abstract

Recent advances in Boolean satisabilit y have made it attractive to solve many digital VLSI design problems such as verication and test generation. Fault diag- nosis and logic debugging have not been addressed by existing satisabilit y-based solutions. This paper at- tempts to bridge this gap by proposing a model-free satisabilit y-based ...More

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