A 0.18 /spl mu/m high-performance logic technology

S G Crowder, Sandro J Greco, Hioktiaq Ng,E Barth, Klaus Beyer, G A Biery, John W D Connolly, C Dewan, Richard A Ferguson,Xu Chen,M J Hargrove,Edward J Nowak, Paul S Mclaughlin, Robert J Purtell, Randy Logan,James M Oberschmidt,A K Ray, D E Ryan,Keri A Tallman, T Wagner,Vincent Mcgahay,E F Crabbe, P Agnello,Ronald D Goldblatt,Li Su,Bijan Davari

Kyoto, Japan（1999）

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摘要

In this paper, we describe a high-performance 0.18 /spl mu/m logic technology with dual damascene copper metallization and dense SRAM memory. Local interconnect technology allows us to fabricate SRAM cells as small as 3.84 /spl mu/m/sup 2/. We demonstrate that copper metallization continues to exhibit performance advantages over aluminum-based technologies in this generation.

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关键词

cmos logic circuits,sram chips,copper,integrated circuit interconnections,integrated circuit measurement,integrated circuit metallisation,ultraviolet lithography,0.18 micron,cmos technology,cu,nfet,pfet,sram cells,aluminum-based technologies,copper metallization,dense sram memory,dual damascene copper metallization,gate lithography,local interconnect technology,logic technology,metallization,logic,space technology,conductors,lithography

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