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ASIP-Based Multiprocessor SoC Design for Simple and Double Binary Turbo Decoding
Design, Automation and Test in Europe, 2006. DATE '06. Proceedings, (2006): 1-6
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Abstract
This paper presents a new multiprocessor platform for high throughput turbo decoding. The proposed platform is based on a new configurable ASIP combined with an efficient memory and communication interconnect scheme. This Application-Specific Instruction-set Processor has an SIMD architecture with a specialized and extensible instruction-...More
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