Modeling of U-shaped and plugged emitter resistance of high speed SiGe HBTs

In this paper, we investigate the emitter resistance Re in SiGe HBTs with speeds up to 280GHz, using a U-shaped polysilicon emitter. We observed that Re increased with lateral scaling, thereby degrading fT. Although a negligible component in the past, in this experiment Re * Ccb transit time delay is playing a more significant role in limiting fT. Re was modeled to explain the increase due to lateral scaling, and was shown to result from the plugging of the emitter opening by the emitter polysilicon. Furthermore, process experiments were conducted to investigate the effect of emitter polysilicon thickness, sidewall height, and emitter i-layer thickness.