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A case for random shortcut topologies for HPC interconnects
Computer Architecture, pp.177-188, (2012)
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As the scales of parallel applications and platforms increase the negative impact of communication latencies on performance becomes large. Fortunately, modern High Performance Computing (HPC) systems can exploit low-latency topologies of high-radix switches. In this context, we propose the use of random shortcut topologies, which are gene...更多
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