SpiNNaker: A Multi-Core System-on-Chip for Massively-Parallel Neural Net Simulation
2012 IEEE CUSTOM INTEGRATED CIRCUITS CONFERENCE (CICC)（2012）
Key words
digital simulation,microprocessor chips,multiprocessing systems,neural nets,parallel processing,system-on-chip,ARM968 processor nodes,GALS system,MPSoC,SpiNNaker,globally asynchronous locally synchronous system,massively-parallel computer system,massively-parallel neural net simulation,multicore system-on-chip,packet-switched asynchronous communications infrastructure,power 1 W,spiking neurons,synchronous islands,voltage 1.2 V
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