Design challenges for a high performance HSDPA RF transceiver IC

Singapore(2009)

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摘要
A tri-band (bands I, II, V/VIII) single-chip RFIC has been designed in 0.18 ¿m SiGe BiCMOS process to meet HSDPA Category 8 requirements. Competitive radio RF performance necessitates optimum tradeoff of design challenges. The transceiver relies on front-end SAW filters for increased system performance margins. Calibration schemes for receive DC offset, transmit carrier leakage, and VCO frequency stability are implemented on-chip to minimize related impairments. The direct-conversion receiver achieves 3-4 dB margin on reference sensitivity and >12 dB margin on all adjacent channel and in-band blocking cases. The direct-modulation transmitter achieves more than 90 dB dynamic range and excellent EVM (3.0%) and ACLR (-48 dBc) performance over the top 11 dB of power range. In Band I, the RX and TX sections draw each 35 mA and 65 mA, respectively. Two dedicated on-chip fast-settling fractional-N synthesizers provide LOs for both RX and TX. The chip is housed in a 5 × 5 mm2 81-pin VFBGA package.
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关键词
3g mobile communication,bicmos integrated circuits,ge-si alloys,code division multiple access,packet radio networks,radio links,radiofrequency integrated circuits,surface acoustic wave filters,system-on-chip,transceivers,voltage-controlled oscillators,aclr,bicmos process,dc offset,evm,hsdpa rf transceiver ic,vco frequency stability,vfbga package,adjacent channel,direct-conversion receiver,direct-modulation transmitter,front-end saw filters,in-band blocking,optimum tradeoff,radio rf performance,reference sensitivity,single-chip rfic,size 0.18 mum,transmit carrier leakage,tri-band,bicmos,dcoc,hsdpa,umts,wcdma,blocking margin,calibration,transceiver,dynamic range,radio transmitters,front end,chip,nonlinear distortion,system on chip,system performance,radio frequency,direct conversion receiver,spread spectrum communication
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