2.4GHz 7mW all-digital PVT-variation tolerant True Random Number Generator in 45nm CMOS

Suresh Srinivasan,Sanu Mathew,Rajaraman Ramanarayanan,Farhana Sheikh,Mark A Anders,Himanshu Kaul,Vasantha Erraguntla,Ram Krishnamurthy,Greg Taylor

VLSI Circuits（2010）

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摘要

An all-digital True Random Number Generator is fabricated in 45nm CMOS with 2.4Gbps random bit throughput and total power consumption of 7mW. Two-step coarse/fine-grained tuning with a self-calibrating feedback loop enables robust operation in the presence of 20% process variation while providing immunity to run-time voltage and temperature fluctuations. The 100% digital design enables a compact layout occupying 4004μm2 with measured entropy of 0.999965, and scalable operation down to 280mV, while passing all NIST RNG tests.

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关键词

cmos digital integrated circuits,uhf circuits,fluctuations,integrated circuit design,integrated circuit testing,random number generation,cmos integrated circuit,nist rng tests,all-digital pvt-variation tolerant,bit rate 2.4 gbit/s,coarse/fine-grained tuning,compact layout,digital design,frequency 2.4 ghz,power 7 mw,random bit throughput,random number generator,self-calibrating feedback loop,size 45 nm,temperature fluctuations,voltage fluctuations,process variation,true random number generator,thermal noise,entropy,noise,nist,feedback loop,radiation detectors,tuning

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