A novel BE-SONOS NAND Flash using non-cut trapping layer with superb reliability

Electron Devices Meeting, 2010, Pages 5.5.1-5.5.4.

Cited by: 6|Bibtex|Views19|DOI:https://doi.org/10.1109/IEDM.2010.5703303
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Abstract:

This work presents superb chip-level reliability of a BE-SONOS charge trapping NAND fabricated in both 75nm and 38nm half-pitches. Without any error correction (ECC) >;100K P/E cycling endurance for SLC and >;3K endurance for MLC are obtained using a novel non-cut SiN trapping layer. Key process integration strategies are discussed, inclu...More

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