A CMOS Duty-Cycled Coherent RF Front-End IC for IR-UWB Systems

2015 IEEE International Conference on Ubiquitous Wireless Broadband (ICUWB)(2015)

引用 5|浏览6
暂无评分
摘要
Current consumption of an IR-UWB receiver is reduced thanks to duty-cycling techniques applied to the full analog chain, thus benefiting from the impulsive nature of the signal. The coherent architecture performs down conversion by mixing the incoming pulse with a locally generated 2.75ns pulse template and needs only a 1GHz frequency synthesis instead of a power hungry 4 or 8 GHz LO. Duty cycling with sub-ns settling time enables up to 82% current savings for the front-end at a 15.6MHz pulse repetition frequency. To operate in a strong interference environment, an optional 4th order Gm-C filter may be switched on. The receiver for IR-UWB communications and ranging is implemented in CMOS 130nm and measurement results confirm the expectations.
更多
查看译文
关键词
CMOS IC,duty-cycled coherent IC,RF front-end IC,IR-UWB systems,IR-UWB receiver,duty-cycling techniques,full analog chain,mixing,pulse template,frequency synthesis,local oscillator,LO,pulse repetition frequency,fourth order Gm-C filter,IR-UWB communications,frequency 1 GHz,frequency 4 GHz,frequency 8 GHz,frequency 15.6 MHz,size 130 nm
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要