A CMOS-compatible process for fabricating electrical through-vias in silicon

Electronic Components and Technology Conference, pp. 831-+, 2006.

Cited by: 80|Views22

Abstract:

In the past, traditional CMOS scaling has been one of the principal levers to achieve increased system-level performance. Today, scaling is becoming increasingly difficult and less effective, and a range of new two- and three-dimensional silicon integration technologies are needed to support next-generation systems. A silicon-carrier Syst...More

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