Design innovations to optimize the 3D stackable vertical gate (VG) NAND flashMarkchunhsiung hung[0]hangting lue[0]shuonan hungchihchang hsieh[0]kuopin chang[0]shihlin huangtzung shen chenchihshen chang[0]wenwei yehyihsuan hsiao[0]chiehfang chen[0]yanru chen[0]More2012.Cited by: 9|Bibtex|Views21|DOI:https://doi.org/10.1109/IEDM.2012.6479015Other Links: academic.microsoft.comKeywords: decodingCode: Data: Full Text (Upload PDF)PPT (Upload PPT)SimilarReferenceCitedUpload PPTYour rating :0 TagsCommentsSubmit
