The Effect Of Interface Trap States On Reduced Base Thickness A-Si/C-Si Heterojunction Solar Cells

A simulation study of (p+) a-Si/ (i) a-Si/ (n) c-Si/ (i) a-Si/ (n+) a-Si solar cell is carried out to identify the carrier loss mechanisms, which are a-Si/c-Si interface and base recombination. Improvements in open circuit voltage (V-OC) and thus the efficiency can be achieved through better a-Si/c-Si interface passivation. In devices with excellent a-Si/c-Si interface passivation, base recombination is the dominant process. In such cases, reducing the base thickness (L-Base) increases the carrier concentration in the base. The L-Base can be reduced without significant loss in short circuit current (J(SC)) through effective light trapping techniques. Next, the relative contributions of the emitter/base ((i) a-Si/ (n) c-Si) and base/Back Surface Field ((n) c-Si/ (i) a-Si) interfaces to the overall carrier recombination loss are discussed. It is found that both interfaces have similar contributions to total carrier loss in long as well as short base devices.