Mining Metadata from SystemC IP Library

Exploring the design space when constructing a system is vital to realize a well-performing design. Design complexity has made building high-level system models to explore the design space an essential but time-consuming and tedious part of the system design. Reduction in design time and acceleration of design exploration can be provided through reusing IP-cores to construct system models. As a result, it is common to have high-level SoC design flow based on IP library promoting reuse. However, the success of these would be dependent on how introspection and reflection capability is provided as well as the interoperability standard are defined. This leads to the important question of what kind of metadata on these IN must be available to allow CAD tools to effectively maneuver these designs as well as allows for a seamless integration and exchange flow between tools and design methodologies. In this chapter, we describe our tool and methodology that allow introspection of SystemC design, so that the extracted metadata enables IP composition. We discuss the issues related to extraction of metadata from IN specified in an expressive language such as C++ and show how our methodology combines C++ and XML parsers and data structures to achieve the above.