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A 16-bit 10Gsps current steering RF DAC in 65nm CMOS achieving 65dBc ACLR multi-carrier performance at 4.5GHz Fout

2015 Symposium on VLSI Circuits (VLSI Circuits)(2015)

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摘要
This paper presents an RF DAC fabricated in a 65nm 1p7m CMOS process. The DAC is capable of >10Gsps operation dissipating ~800mW. At 3Gsps the SFDR > 70dBc beyond 1GHz and the IM3 performance is <; -80dBc within the same range. Signal processing is incorporated into the DAC providing interpolation and modulation through the full Nyquist band. Features and performance enable a wide application range including cable infrastructure, wireless communications, instrumentation, defense & aerospace. These performance capabilities are enabled by a modified DAC switch output structure and a novel current source calibration scheme 1 .
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关键词
CMOS,digital-to-analog converter (DAC),RF DAC,current-steering
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