IMPACTS OF RANDOM TELEGRAPH NOISE (RTN) ON THE ENERGY DELAY TRADEOFFS OF LOGIC CIRCUITS
2016 CHINA SEMICONDUCTOR TECHNOLOGY INTERNATIONAL CONFERENCE (CSTIC)(2016)
摘要
In this paper, the impacts of random telegraph noise (RTN) on delay and energy of digital logic circuits arc studied. The conventional method of extracting logic gate delay is found inaccurate due to the bias dependency of RTN amplitude. Thus an appropriate measuring strategy is proposed, based on which the impact of single RTN on circuit delay is investigated, and non-monotonous trend against trap energy level Et is found. Furthermore, the impacts of multi RTN on Energy-Delay(ED) curves are discussed. It is found that RTN is unneglectable when performing an ED optimization. Otherwise, under-design phenomenon would occur considering delay constraint, and over-design would occur considering energy constraint. This result provide helpful guidelines for circuit design.
更多查看译文
关键词
random telegraph noise,RTN amplitude,energy-delay tradeoffs,digital logic circuits,logic gate delay,circuit delay,trap energy level,energy-delay curves,energy-delay optimization,delay constraint
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络