MapReduce-based pattern classification for design space analysis
2018 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)(2018)
摘要
With the ongoing reduction of feature size, design for manufacturability is a critical concern in advanced technology nodes. Pattern classification is a promising and widely employed approach for design space analysis, design rule generation, and yield optimization. In this paper, we propose a hybrid algorithm that account for two variations for classification metrics: feature edge displacement and total feature area difference. A MapRe-duce-based framework is proposed to reduce the complexity of the pattern classification problem such that orders of magnitude of performance improvement can be realized. Our experimental results indicate that regarding accuracy and runtime, this work out-performs the winner of the CAD Contest at ICCAD 2016 in terms of contest scoring measure.
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关键词
MapReduce,Prüfer encoding,pattern classification,design for manufacturability
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