An Exploration of Applying Gate-Length-Biasing Techniques to Deeply-Scaled FinFETs Operating in Multiple Voltage Regimes

With the aggressive downscaling of process technologies and the importance of batterypowered systems, reducing leakage power consumption has become a crucial design challenge for IC designers. In addition, the traditional bulk CMOS technologies face significant challenges related to short-channel effects and process variations. FinFET dev...More