A Low-Leakage Power Clamp Esd Protection Circuit With Prolonged Esd Discharge Time And Compact Detection Network

PROCEEDINGS OF 2015 IEEE 11TH INTERNATIONAL CONFERENCE ON ASIC (ASICON)(2015)

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摘要
A novel power-rail ESD clamp circuit with a small time constant to achieve a longer turn-on time is proposed. During an ESD event, the turn-on time of discharge transistor M-big in the proposed circuit is 5.87 times of that of the traditional one; under the normal power supply condition, the total leakage current has reduced to 4.635% compared with the leakage current of traditional circuit; under fast power supply condition, the proposed power-rail ESD clamp circuit can work efficiently with a turned off discharge transistor, thus avoiding the loss of power consumption due to the false triggering in traditional power-rail ESD clamp circuit.
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关键词
electrostatic discharge (ESD), power clamp circuit, leakage current, mis-triggering
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