High-Frequency Absorption-FIFO Pipelining for Stratix 10 HyperFlex
PROCEEDINGS 26TH IEEE ANNUAL INTERNATIONAL SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES (FCCM 2018), pp. 97-100, 2018.
FPGAs often have significantly lower clock frequencies than microprocessors and CPUs, due largely to propagation delays incurred by the reconfigurable interconnect. The Stratix 10 HyperFlex architecture reduces this problem by embedding numerous registers throughout the routing resources. However, such Hyper-Registers do not support back-...More
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