Aligned Carbon Nanotube Synaptic Transistors for Large-Scale Neuromorphic Computing.

This paper presents aligned carbon nanotube (CNT) synaptic transistors for large-scale neuromorphic computing systems. The synaptic behavior of these devices is achieved via charge trapping effects, commonly observed in carbon-based nanoelectronics. In this work, charge trapping in the high-k dielectric layer of top-gated CNT FETs enables the gradual analog programmability of the CNT channel conductance with a large dynamic range (i.e., large on/off ratio). Aligned CNT synaptic devices present significant improvements over conventional memristor technologies (e.g., RRAM) which suffer from abrupt transitions in the conductance modulation and/or a small dynamic range. Here, we demonstrate exceptional uniformity of aligned CNT FET synaptic behavior, as well as significant robustness and non-volatility via pulsed experiments, establishing their suitability for neural network implementations. Additionally, this technology is based on a wafer-level technique for constructing highly-aligned arrays of CNTs with high semiconducting purity, and is fully CMOS compatible, ensuring the practicality of large-scale CNT+CMOS neuromorphic systems. We also demonstrate fine tunability of the aligned CNT synaptic behavior, and discuss its application to adaptive on-line learning schemes, and to homeostatic regulation of artificial neuron firing rates. We simulate the implementation of unsupervised learning for pattern recognition using a spike-timing-dependent-plasticity scheme, indicate system-level performance (as indicated by the recognition accuracy), and demonstrate improvements in the learning rate resulting from tuning the synaptic characteristics of aligned CNT devices.